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  4. A 2.2 NEF Neural-Recording Amplifier Using Discrete-Time Parametric Amplification
 
conference paper

A 2.2 NEF Neural-Recording Amplifier Using Discrete-Time Parametric Amplification

Jang, T.
•
Lim, J.
•
Choo, K.  
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2018
2018 IEEE Symposium on VLSI Circuits proceedings
IEEE Symposium on VLSI Circuits

This paper proposes a 2.2 noise efficiency factor (NEF) instrumentation amplifier for neural recording applications. A parametric amplifier based on the MOS C-V characteristic is designed as a pre-amplifier stage, lowering the input referred noise of the following stages by 3.4 x Sampling noise is minimized by oversampling the input signal and switching power is reduced by adopting an 8-phase soft-charging technique.

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Type
conference paper
DOI
10.1109/VLSIC.2018.8502432
Author(s)
Jang, T.
Lim, J.
Choo, K.  
Nason, S.
Lee, J.
Oh, S.
Jeong, S.
Chestek, C.
Sylvester, D.
Blaauw, D.
Date Issued

2018

Publisher

IEEE

Published in
2018 IEEE Symposium on VLSI Circuits proceedings
Start page

237

End page

238

Editorial or Peer reviewed

REVIEWED

Written at

OTHER

EPFL units
MSIC-LAB  
Event nameEvent placeEvent date
IEEE Symposium on VLSI Circuits

Honolulu, HI, USA

18-22 June 2018

Available on Infoscience
April 1, 2022
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/186828
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