Meshing strategy of equivalent substrate schematic in SMART power IC
In this paper, a modeling methodology able to create an equivalent schematic of an High-Voltage integrated circuit is developed. The equivalent schematic is based on enhanced model of diodes and resistances, accounting for minority and majority carrier propagation at their boundary. In this work, the methodology to interconnect these elements in order to be able to model multi-dimensional current path is developed and applied to an industrial H-Bridge architecture. The coupled parasitic currents obtained with the equivalent schematic are compared against measurements and confirm that the model is accurate and can be used to estimate substrate parasitic signals. © 2011 IEEE.
WOS:000297265301015
2011
978-142449473-6
IEEE International Symposium on Circuits and Systems
821
824
REVIEWED
EPFL
Event name | Event place | Event date |
Rio de Janeiro, Brazil | 15-18 05 2011 | |