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conference paper
645 V quasi-vertical GaN power transistors on silicon substrates
May 13, 2018
2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD)
In this paper, we present GaN-on-Si vertical transistors consisting of a 6.7 pm thick n-p-n heterostructure grown on 6-inch silicon substrates by MOCVD. The fabricated vertical trench gate MOSFETs exhibited E-mode operation with a threshold voltage of 3.3 V and an on/off ratio of over 108. A specific on-resistance of 6.8 mSL"cm2 and a high off-state breakdown voltage of 645 V were achieved. These results show the great potential of the GaN-on-Si platform for the next generation of cost-effective power electronics.
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Name
C.Liu et al., ISPSD proceeding 2.pdf
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openaccess
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833.01 KB
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Adobe PDF
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