conference paper
Area- and throughput-optimized VLSI architecture of sphere decoding
2010
2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip
Type
conference paper
Author(s)
Date Issued
2010
Publisher
Published in
2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip
Start page
189
End page
194
Peer reviewed
REVIEWED
Written at
EPFL
EPFL units
| Event name | Event place | Event date |
Madrid, Spain | 27-29 09 2010 | |
Available on Infoscience
August 21, 2011
Use this identifier to reference this record