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  4. Future of Computing: towards Energy Efficient Cognitive Chips
 
conference paper

Future of Computing: towards Energy Efficient Cognitive Chips

Ionescu, Adrian M.  
2025
2025 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2025 - Proceedings of Technical Papers
International VLSI Symposium on Technology, Systems and Applications (VLSI TSA 2025)

The exponential growth of Artificial Intelligence (AI) and the Internet of Things (IoT) demands a paradigm shift in hardware design to ensure energy-efficient, sustainable computing. This talk will explore emerging trends in low-power AI hardware for Edge applications, for billions of autonomous systems operating under stringent energy constraints. These systems will drive advancements in Industry 4.0, autonomous robotics, personalized healthcare, and smart environmental monitoring. A key challenge lies in designing cognitive AI chips that integrate recent breakthroughs in 2D semiconductors, functional oxides, and neuromorphic computing architectures, seamlessly coupled with CMOS circuits. We will discuss novel energy-efficient computing paradigms inspired by the brain, leveraging neuromorphic computing, end-to-end spiking IoT nodes, memristive devices and novel adaptive materials, to push the boundaries of intelligence at the Edge. Some of targeted figures of merit include, but are not limited to: energy efficiency (e.g. <1 pJ per synaptic operation), computing throughput and density (e.g >10 TOPS/W), latency (e.g. sub-ms per inference step) and scalability (e.g. sub-10 nm devices with 3D integration potential). We cover critical aspects of sensing, processing, communication, and energy management for self-sustained AI hardware, aiming to bridge the gap between fundamental nanoscience and real-world AI deployment.

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Type
conference paper
DOI
10.1109/VLSITSA64674.2025.11047135
Scopus ID

2-s2.0-105010822497

Author(s)
Ionescu, Adrian M.  

École Polytechnique Fédérale de Lausanne

Date Issued

2025

Publisher

Institute of Electrical and Electronics Engineers Inc.

Published in
2025 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2025 - Proceedings of Technical Papers
ISBN of the book

9798331543129

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
NANOLAB  
Event nameEvent acronymEvent placeEvent date
International VLSI Symposium on Technology, Systems and Applications (VLSI TSA 2025)

Hsinchu, Taiwan, Province of China

2025-04-21 - 2025-04-24

FunderFunding(s)Grant NumberGrant URL

ERC

Swiss Chips

Available on Infoscience
July 29, 2025
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/252750
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