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research article

Cooperative Shared Memory: Software and Hardware for Scalable Multiprocessors

Hill, Mark D.
•
Larus, James R.
•
Reinhardt, Steven K.
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1993
ACM Transactions on Computer Systems

We believe the paucity of massively parallel, shared-memory machines follows from the lack of a shared-memory programming performance model that can inform programmers of the cost of operations (so they can avoid expensive ones) and can tell hardware designers which cases are common (so they can build simple hardware to optimize them). Cooperative shared memory, our approach to shared-memory design, addresses this problem. Our initial implementation of cooperative shared memory uses a simple programming model, called Check-In/Check-Out (CICO), in conjunction with even simpler hardware, called Dir1SW. In CICO, programs bracket uses of shared data with a check_in directive terminating the expected use of the data. A cooperative prefetch directive helps hide communication latency. Dir1SW is a minimal directory protocol that adds little complexity to message-passing hardware, but efficiently supports programs written within the CICO model.

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Type
research article
DOI
10.1145/161541.161544
Author(s)
Hill, Mark D.
•
Larus, James R.
•
Reinhardt, Steven K.
•
Wood, David A.
Date Issued

1993

Publisher

ACM

Published in
ACM Transactions on Computer Systems
Volume

11

Issue

4

Start page

300

End page

318

Note

Earlier version appeared in Fifth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS V).

Peer reviewed

REVIEWED

Written at

OTHER

EPFL units
VLSC  
Available on Infoscience
December 23, 2013
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/98697
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