The paper presents an influence of leakage effect observed in capacitive analog memories on learning process in hardware implemented Kohonen neural networks with MOS transistors used as switches connected with information holding capacitors. The learning results, i.e. variations (adaptations) of weight values, strongly depend on the transistor leakage currents. This is a cause for some quantization error associated with the weight adaptations during the network training. The unwanted leakage influence can be minimized in several ways discussed in this paper. As expected, the observed leakage influence on the memory storage time rises with an increase of temperature. This has been verified by means of computer simulations (Matlab, HSpice) as well as measurements of a prototyped Kohonen network chip (0.18 mu m CMOS process).