Cascode topology which includes a high-voltage GaN and a low-voltage Si transistor is an attractive device concept, which uses the low ON-resistance of GaN while still being compatible with Si gate drivers. It demonstrates the highest threshold voltage among normally-OFF GaN devices, which is a favorable feature in power electronics. However, the observation of instability in power circuits using cascode devices highlights the need for a careful analysis to reveal the origins of this phenomenon, to fulfill the unique feature of these devices in high efficiency and reliable power converters. In this letter, we demonstrate the presence of negative resistance in cascode devices, which explains the previously reported large-signal instabilities. We describe a theory to characterize this negative resistance behavior based on the sub-threshold-voltage operation of the high-voltage GaN transistors, and propose guidelines to resolve this issue in cascode devices. Negative resistance behavior, although not favorable for a power transistor, is of great importance in high-frequency electronics, with applications in reflection-type power amplifiers. These results, together with the presented analysis, could inform the development of high-stability, low-loss devices for future efficient power converters.