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  4. Small-Signal Approach for Precise Evaluation of Gate Losses in Soft-Switched Wide-Band-Gap Transistors
 
conference paper

Small-Signal Approach for Precise Evaluation of Gate Losses in Soft-Switched Wide-Band-Gap Transistors

Jafari, Armin  
•
Nikoo, Mohammad Samizadeh
•
Perera, Nirmana
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November 30, 2020
2020 IEEE 21st Workshop on Control and Modeling for Power Electronics (COMPEL)
2020 IEEE 21st Workshop on Control and Modeling for Power Electronics (COMPEL)

High-frequency switching is favorable for fast transient response, small size of passive components and superior power density, especially in soft-switching topologies. At high frequencies, power dissipation due to consecutive charging/discharging of gate capacitance is considerably large. As presented in this work, the actual gate charge of a transistor can be very different from the typical values reported in manufacturer datasheet, which leads to errors in estimation and modeling of gate loss based on datasheets. Furthermore, the reported QG values in datasheets correspond to a hard-switching test condition, and are not a good representative of the losses in soft-switched transistors. Here, we propose a simple method to precisely evaluate gate loss in soft-switched transistors for high-frequency applications. A small-signal input-capacitance measurement is used to derive gate loss in two commercial Gallium-Nitride (GaN) transistors. The estimated losses are then verified by results from accurate thermal modeling based on a matrix of temperatures, when the transistors are driven up to 30 MHz. The results are of great significance to the modeling and accurate measurement of gate losses at high frequencies. It is instrumental to a proper cooling design to avoid device and gate driver thermal runaway and failure. Also, the more accurate gate capacitance measurement enables an accurate dead time adjustment to achieve synchronized turn ON between various transistors in soft-switching topologies.

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Type
conference paper
DOI
10.1109/COMPEL49091.2020.9265751
Author(s)
Jafari, Armin  
Nikoo, Mohammad Samizadeh
Perera, Nirmana
Karakaya, Furkan
Soleimanzadeh, Reza
Matioli, Elison  
Date Issued

2020-11-30

Publisher

IEEE

Published in
2020 IEEE 21st Workshop on Control and Modeling for Power Electronics (COMPEL)
ISBN of the book

978-1-728171-61-6

Total of pages

5

Start page

1

End page

5

Subjects

GaN

•

SiC

•

gate charge

•

gate capacitance

•

gate loss

•

small-signal measurement

•

high-frequency circuits

•

soft switching

•

thermal measurements

•

variance in gate charge

•

hard gating

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
POWERLAB  
Event nameEvent placeEvent date
2020 IEEE 21st Workshop on Control and Modeling for Power Electronics (COMPEL)

Aalborg, Denmark

November 9-12, 2020

Available on Infoscience
December 1, 2020
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/173740
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