conference paper
Area, throughput, and energy-efficiency trade-offs in the VLSI implementation of LDPC decoders
2011
Proceedings of the IEEE International Symposium of Circuits and Systems (ISCAS)
Type
conference paper
Author(s)
Date Issued
2011
Published in
Proceedings of the IEEE International Symposium of Circuits and Systems (ISCAS)
Start page
1772
End page
1775
Editorial or Peer reviewed
REVIEWED
Written at
EPFL
| Event name | Event place | Event date |
Rio de Janeiro, Brazil | May 15-18, 2011 | |
Available on Infoscience
August 21, 2011
Use this identifier to reference this record