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  4. E-mode digitally recessed p-NiO tri-junction HEMT with <i>V</i> BR of 2.5 kV
 
research article

E-mode digitally recessed p-NiO tri-junction HEMT with V BR of 2.5 kV

Esteghamat, Amirhossein  
•
Rezaei, M. A.  
•
Fonollosa, Jon Elipe
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February 5, 2026
APL Electronic Devices

In this work, an AlGaN/GaN high electron mobility transistor (HEMT) with a large positive threshold voltage (VTH) is demonstrated, based on a digitally recessed barrier combined with a p-type NiO/SiO2 gate dielectric stack to form a recessed tri-junction HEMT (TJHEMT). Digital etching precisely recesses both the AlGaN barrier and sidewalls of the fins with nanometer-scale control, which combined with an additional depletion from p-type NiO/SiO2 gate dielectric stack, results in a VTH up to 1.5 V at 1 μA/mm. Moreover, unlike typical tri-gate structures, this large VTH was achieved with feature sizes larger than 180 nm. The high-quality gate stack, along with superior tri-gate control, resulted in negligible threshold voltage hysteresis (ΔVTH) of less than 0.1 V, ideal subthreshold slope (SS) of 60 mV/dec, and ON/OFF current ratio of 109. The estimated maximum applicable VGS from time-dependent gate breakdown (TDGB) was 6.4 V for a lifetime of 10 years at 63% failure level. Furthermore, the devices presented a small specific on-resistance (RON,SP) of 3.8 mΩ·cm2 for a gate-to-drain separation (LGD) of 20 μm, together with a high breakdown voltage (VBR) of 2.5 kV (measured at 1 μA/mm). The excellent performance together with the large feature sizes demonstrates the feasibility of mass-production of tri-gate enhancement-mode (E-mode) devices.

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016110_1_5.0314238.pdf

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