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  4. A 51.4 Mb/s FSK Transmitter Employing a Phase Domain Digital Synthesizer with 1.5 mu s Start-up for Energy Efficient Duty Cycling
 
conference paper

A 51.4 Mb/s FSK Transmitter Employing a Phase Domain Digital Synthesizer with 1.5 mu s Start-up for Energy Efficient Duty Cycling

Thirunarayanan, Raghavasimhan
•
Ruffieux, David
•
Scolari, Nicola
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2016
Esscirc Conference 2016
46th European Solid-State Device Research Conference (ESSDERC) / 42nd European Solid-State Circuits Conference (ESSCIRC)

This paper presents a low start-up latency Transmitter (TX) that can achieve FSK data rates of upto 51.4 Mb/s for deployment in duty cycled microsensor nodes. Utilizing a Phase Domain Digital Synthesizer with an FBAR frequency reference, this TX has a start-up latency of just 1.5 mu s. It has been integrated in a 65nm technology and outputs upto 3 dBm power. It achieves a phase noise of -110 dBc/Hz at 1 MHz offset and has a frequency coverage of 2.17 - 2.47 GHz. The power consumption of this TX (including the Digital Baseband) varies from 15 mW at 1.2 Mb/s to 21.4 mW at 51.4 Mb/s. At peak data rate, this leads to an Duty-Cycling-Energy/bit (which takes into account the start-up energy) of 500 pJ/b for transmitting packets of length 32 bytes. Moreover, the TX incorporates a Hybrid Requantizer circuit which helps to trade off in-band noise with the spurs due to the non-linearity induced Sigma Delta noise folding.

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Type
conference paper
DOI
10.1109/ESSCIRC.2016.7598259
Web of Science ID

WOS:000386656300030

Author(s)
Thirunarayanan, Raghavasimhan
Ruffieux, David
Scolari, Nicola
Enz, Christian  
Date Issued

2016

Publisher

Ieee

Publisher place

New York

Published in
Esscirc Conference 2016
ISBN of the book

978-1-5090-2972-3

Total of pages

4

Series title/Series vol.

Proceedings of the European Solid-State Circuits Conference

Start page

129

End page

132

Subjects

Energy Efficiency

•

Duty Cycling

•

FBAR

•

Phase Domain Digital Synthesizer

•

Hybrid Requantizer

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
LSI2  
Event nameEvent placeEvent date
46th European Solid-State Device Research Conference (ESSDERC) / 42nd European Solid-State Circuits Conference (ESSCIRC)

Lausanne, SWITZERLAND

SEP 12-15, 2016

Available on Infoscience
January 24, 2017
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/133429
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