Repository logo

Infoscience

  • English
  • French
Log In
Logo EPFL, École polytechnique fédérale de Lausanne

Infoscience

  • English
  • French
Log In
  1. Home
  2. Academic and Research Output
  3. Conferences, Workshops, Symposiums, and Seminars
  4. Precisely-timed synchronization among spiking neuron circuits on silicon neural networks - Analog implementation of integrate-and-fire neurons, depressing synapses, and STDP learning units
 
conference paper

Precisely-timed synchronization among spiking neuron circuits on silicon neural networks - Analog implementation of integrate-and-fire neurons, depressing synapses, and STDP learning units

Hirose, Tetsuya
•
Schmid, Alexandre  
•
Asai, Tetsuya
Show more
2005
IEICE Technical Report
IEICE Technical Report
  • Details
  • Metrics
Type
conference paper
Author(s)
Hirose, Tetsuya
Schmid, Alexandre  
Asai, Tetsuya
Leblebici, Yusuf  
Amemiya, Yoshihito
Date Issued

2005

Published in
IEICE Technical Report
Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
LSM  
Event name
IEICE Technical Report
Available on Infoscience
December 7, 2006
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/237802
Logo EPFL, École polytechnique fédérale de Lausanne
  • Contact
  • infoscience@epfl.ch

  • Follow us on Facebook
  • Follow us on Instagram
  • Follow us on LinkedIn
  • Follow us on X
  • Follow us on Youtube
AccessibilityLegal noticePrivacy policyCookie settingsEnd User AgreementGet helpFeedback

Infoscience is a service managed and provided by the Library and IT Services of EPFL. © EPFL, tous droits réservés