A 65nm pixel readout ASIC with quick transverse momentum discrimination capabilities for the CMS Tracker at HL-LHC
A readout ASIC for the hybrid pixel detector with the capability of performing quick recognition of particles with high transverse momentum has been designed for the requirements of the CMS Outer Tracker at the High Luminosity LHC. The particle momentum dicrimination capability represents the main challenge for this design together with the low power requirement: the constraint of low mass for the new tracker dictates a total power budget of less than 100 mW/cm(2). The choice of a 65 nm CMOS technology has made it possible to satisfy this power requirement despite the fairly large amount of logic necessary to perform the momentum discrimination and the continuous operation at 40 MHz. Several techniques for low power have been used to implement this logic that performs cluster reduction, position offset correction and coordinate encoding. A prototype chip including a large part of the final functionality and the full front-end has been realized and comprises a matrix of 16 by 3 rectangular pixels of 100 mu m x 1446 mu m, providing 7.65 mm(2) of segmented active area. Measurements of the analog front-end characteristics closely match the simulations and confirm the consumption of <30 mu A per pixel. Front-end characterization and irradiation results up to 150 MRad are also reported.
WOS:000371469800054
2016
Bristol
9
11
C01054
REVIEWED
Event name | Event place | Event date |
Lisbon, PORTUGAL | SEP 28-OCT 02, 2015 | |