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  4. A compact modular architecture for the realization of high-speed binary sorting engines based on rank ordering
 
conference paper

A compact modular architecture for the realization of high-speed binary sorting engines based on rank ordering

Hatirnaz, I.
•
Leblebici, Y.  
2000
2000 IEEE International Symposium on Circuits and Systems (ISCAS)
2000 IEEE International Symposium on Circuits and Systems
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sorterISCAS00.pdf

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130986bbe367c0a0048786be5e398309

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