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  4. Inverse Gating for Low Energy Block Ciphers
 
conference paper

Inverse Gating for Low Energy Block Ciphers

Banik, Subhadeep  
•
Bogdanov, Andrey
•
Isobe, Takanori
Show more
2018
2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
IEEE International Symposium on Hardware Oriented Security and Trust

In this paper we explore the technique of “inverse gating” which is a significant improvement over the ”round gating” technique introduced in HOST 2016. Round gating worked by generating timing signals to separate glitch propagation from one circuit element to the next. Inverse gating generates the same timing signals required to segregate transient round signals, in a manner that incurs less delay and hence lesser switching activity in the circuits. We also show that energy-wise, inverse gated circuits outperform round gated circuits by a margin of around 30 %. In the second part of the paper, we further explore the efficiency of the energy reduction by tuning some of the design parameters. The most natural candidate for this was the delay of the buffer used for creating the timing signals. We found that the optimal energy consumption for any round and inverse gated unrolled block cipher occurs at a particular range of this delay value. We try to explain the optimality of this particular choice of design parameter with the help of the implementation of the AES-128 block cipher.

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Type
conference paper
DOI
10.1109/HST.2018.8383909
Author(s)
Banik, Subhadeep  
Bogdanov, Andrey
Isobe, Takanori
Hiwatari, Harunaga
Akishita, Toru
Regazzoni, Francesco  
Date Issued

2018

Published in
2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
Start page

173

End page

176

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
LASEC  
Event name
IEEE International Symposium on Hardware Oriented Security and Trust
Available on Infoscience
January 17, 2018
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/144219
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