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conference paper

Programmable code processor for software defined radio

Bischoff, R.
•
Biveroni, J.
•
Bruehwiler, M.
Show more
2003
Conference Record Of The Thirty-Seventh Asilomar Conference On Signals, Systems & Computers
37th Asilomar Conference on Signals, Systems and Computers

This paper describes a flexible processor capable of producing binary codes for various standards such as UNITS and 802.11b. Its field of application lies in base-stations and in future software defined radio terminals. Because of its flexibility just one or two instances may be integrated into a SoC (System on Chip) where multiple codes are needed. This approach adds flexibility compared to a dedicated code generating structure where the class of codes is fixed. Specialized Bit-ALUs allow to address multiple bits of a register and to operate simultaneously on them. Instructions tailored for code generation enhance its efficiency considerably. The processor was successfully integrated and tested in a 0.25mum 5ML CMOS process.

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Type
conference paper
DOI
10.1109/ACSSC.2003.1292362
Web of Science ID

WOS:000189498700406

Author(s)
Bischoff, R.
•
Biveroni, J.
•
Bruehwiler, M.
•
Burg, A.  
•
Felber, N.
•
Fichtner, W.
•
Perels, D.
Date Issued

2003

Publisher

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa

Published in
Conference Record Of The Thirty-Seventh Asilomar Conference On Signals, Systems & Computers
ISBN of the book

0-7803-8104-1

Volume

2

Start page

2156

End page

2160

Subjects

Spreading Codes

•

Cdma

Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
TCL  
Event nameEvent placeEvent date
37th Asilomar Conference on Signals, Systems and Computers

Pacific Grove, CA

Nov 09-12, 2003

Available on Infoscience
June 6, 2011
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/68351
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