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  4. Dynamic Reallocation of Functional Units in Superscalar Processors
 
conference paper

Dynamic Reallocation of Functional Units in Superscalar Processors

Epalza, Marc
•
Ienne, Paolo  
•
Mlynek, Daniel
2004
Proceedings of the 9th Asia-Pacific Computer Systems Architecture Conference
  • Details
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Type
conference paper
Web of Science ID

WOS:000224102200016

Author(s)
Epalza, Marc
Ienne, Paolo  
Mlynek, Daniel
Date Issued

2004

Published in
Proceedings of the 9th Asia-Pacific Computer Systems Architecture Conference
Start page

185

End page

98

Subjects

Reconfigurable Computing

Written at

EPFL

EPFL units
LAP  
Available on Infoscience
August 8, 2005
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/215193
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