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  4. A real-time 4-stream MIMO-OFDM transceiver: System design, FPGA implementation, and characterization
 
research article

A real-time 4-stream MIMO-OFDM transceiver: System design, FPGA implementation, and characterization

Haene, Simon
•
Perels, David
•
Burg, Andreas  
2008
Ieee Journal On Selected Areas In Communications

When designing complex communication systems, such as MIMO-OFDM transceivers, prototypes have become an important tool for understanding the implementation trade-offs and the system behavior. This paper presents a real-time FPGA prototype for a 4-stream MIMO-OFDM transceiver capable of transmitting 216 Mbit/s in 20MHz bandwidth. The paper covers all parts of the system from RF to channel decoding and considers both algorithm and implementation aspects. In particular, we discuss the initial parameter estimation, channel estimation, MIMO detection, parameter tracking, and channel, decoding. FPGA implementation results are reported along with measurements that demonstrate the throughput of spatial multiplexing with four spatial streams.

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Type
research article
DOI
10.1109/JSAC.2008.080805
Web of Science ID

WOS:000259574500005

Author(s)
Haene, Simon
•
Perels, David
•
Burg, Andreas  
Date Issued

2008

Published in
Ieee Journal On Selected Areas In Communications
Volume

26

Start page

877

End page

889

Subjects

Mimo

•

Ofdm

•

prototype

•

FPGA implementation

•

measurements

•

802.11n

•

Vlsi

•

Frequency Offset

•

Wireless System

•

Prototype

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
TCL  
Available on Infoscience
June 6, 2011
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/68388
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