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research article

Ultrathin Junctionless Nanowire FET Model, Including 2-D Quantum Confinements

Shafizade, Danial
•
Shalchian, Majid
•
Jazaeri, Farzan  
September 1, 2019
IEEE Transactions On Electron Devices

In this paper, we develop an explicit model to predict the dc electrical behavior in ultrathin surrounding gate junctionless (JL) nanowire field-effect transistors (FETs). The proposed model considers 2-D electrical and geometrical confinements of carrier charge density within few discrete subbands. Combining a parabolic approximation of the Poisson equation, the first-order perturbation theory for the Schrodinger subband energy eigenvaluesand the Fermi-Dirac statistics for the confined carrier density lead to an explicit solution of the dc characteristic in ultrathin JL devices. Validity of the model has been verified with technology computer-aided design simulations. The results confirm its validity for all regions of operation, i.e., from deep depletion to accumulation and from linear to saturation. This represents an essential step toward analysis of circuits based on JL nanowire devices.

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Type
research article
DOI
10.1109/TED.2019.2930533
Web of Science ID

WOS:000482583200062

Author(s)
Shafizade, Danial
Shalchian, Majid
Jazaeri, Farzan  
Date Issued

2019-09-01

Published in
IEEE Transactions On Electron Devices
Volume

66

Issue

9

Start page

4101

End page

4106

Subjects

Engineering, Electrical & Electronic

•

Physics, Applied

•

Engineering

•

Physics

•

gate-all-around (gaa) field-effect transistors (fets)

•

junctionless (jl) fets

•

nanowire fets

•

quantum well

•

ultrathin body silicon on insulator (utbsoi)

•

compact model

•

transistors

•

impact

•

mosfet

Editorial or Peer reviewed

REVIEWED

Written at

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September 11, 2019
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/161041
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