conference paper
CMOS Current Steering Logic: Toward a matured technique for mixed-mode applications
1997
Proceedings of the Ieee 1997 Custom Integrated Circuits Conference
This paper presents a detailed analysis of the CMOS Current Steering Logic (CSL) technique and compares experimentally its digital switching noise to that of the CMOS static logic. Theoretical analysis of the CSL inverter is developed. More complex gates using this technique are presented. Results are validated by simulations and measurement.
Type
conference paper
Web of Science ID
WOS:A1997BJ05Q00073
Author(s)
Date Issued
1997
Published in
Proceedings of the Ieee 1997 Custom Integrated Circuits Conference
Start page
349
End page
352
Editorial or Peer reviewed
REVIEWED
Written at
EPFL
EPFL units
| Event name | Event place | Event date |
Santa Clara, CA | May 05-08, 1997 | |
Available on Infoscience
October 21, 2010
Use this identifier to reference this record