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  4. Implementation of Structured ASIC Fabric Using Via-Programmable Differential MCML Cells
 
conference paper

Implementation of Structured ASIC Fabric Using Via-Programmable Differential MCML Cells

Badel, Stéphane
•
Hatirnaz, Ilhan
•
Leblebici, Yusuf  
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2006
Proceedings of the IFIP International Conference on Very Large Scale Integration (VLSI-SoC)
IFIP International Conference on Very Large Scale Integration (VLSI-SoC)

This paper presents a regular layout fabric made of via-programmable MCML universal logic cells for structured ASIC applications and the associated design flow. The proposed structured ASIC fabric offers very high noise immunity due to the differential operation, as well as low production cost due to the via-programmable properties of the universal logic cell. Implementations of a number of circuits are presented and the area/speed performances are compared with classical CMOS implementation using a commercial standard cell library in 0.18 μm CMOS technology.

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Type
conference paper
DOI
10.1109/VLSISOC.2006.313239
Web of Science ID

WOS:000243523900041

Author(s)
Badel, Stéphane
Hatirnaz, Ilhan
Leblebici, Yusuf  
Brauer, Elizabeth J.
Date Issued

2006

Published in
Proceedings of the IFIP International Conference on Very Large Scale Integration (VLSI-SoC)
Start page

234

End page

238

Subjects

MCML

•

Differential Logic

•

Structured ASIC

URL

URL

http://tima.imag.fr/conferences/VLSI-SoC06/
Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
LSM  
Event nameEvent placeEvent date
IFIP International Conference on Very Large Scale Integration (VLSI-SoC)

Nice, France

October 16-18

Available on Infoscience
December 19, 2006
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/238580
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