A 3T gain cell includes a write transistor, a storage transistor and a read transistor. The write transistor has a first diffusion connected to a write bit line (WBL), a gate connected to a write word line (WWL) and a second diffusion. The storage transistor has a gate connected to said second diffusion of said write transistor, a first diffusion connected to a read bit line (RBL), and a second diffusion. The read transistor has a gate connected to a read word line (RWL) a first diffusion connected to said second diffusion of said storage transistor, and a second diffusion connected to a reference voltage.