Orthogonal differential vector signaling codes with embedded clock
Orthogonal differential vector signaling codes are described which support encoded sub-channels allowing transport of distinct but temporally aligned data and clocking signals over the same transport medium. Embodiments providing enhanced LPDDR interfaces are described which are suitable for implementation in both conventional high-speed CMOS and DRAM integrated circuit processes.
55181167
Alternative title(s) : (de) Orthogonale differenzielle vektorsignalisierungscodes mit eingebettetem takt (fr) Codes de signalisation vectorielle différentielle orthogonaux à horloge intégrée
| DOI | Country code | Kind code | Date issued |
CN110008166 | CN | B | 2023-07-18 |
EP3175592 | EP | B1 | 2021-12-29 |
US10652067 | US | B2 | 2020-05-12 |
CN110008166 | CN | A | 2019-07-12 |
CN106576087 | CN | B | 2019-04-12 |
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KR101949964 | KR | B1 | 2019-02-20 |
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EP3175592 | EP | A4 | 2018-01-17 |
US9838234 | US | B2 | 2017-12-05 |
EP3175592 | EP | A1 | 2017-06-07 |
CN106576087 | CN | A | 2017-04-19 |
KR20170040304 | KR | A | 2017-04-12 |
US2017026217 | US | A1 | 2017-01-26 |
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WO2016019384 | WO | A1 | 2016-02-04 |