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patent

Silicon nitride waveguide or photonic integrated circuit fabrication method

Kippenberg, Tobias  
•
Ji, Xinru  
•
Wang, Rui Ning
2024

Silicon nitride waveguide fabrication method including providing a substrate including a stress release trench structure, the stress release recess structure being formed in a silicon oxide layer, depositing a silicon nitride material or layer onto the silicon oxide layer, providing a silicon oxide hard mask on the deposited silicon nitride material or layer to provide an exposed surface delimited by the silicon oxide hard mask and defined by the deposited silicon nitride material or layer, the silicon oxide hard mask including or defining an elongation extending on the deposited silicon nitride material or layer, dry etching the exposed surface a silicon nitride elongated waveguide core located between the silicon oxide hard mask and the silicon oxide layer in which the stress release trench structure is formed; and depositing a silicon oxide cladding layer on the silicon oxide hard mask to form a cladding structure of the silicon nitride waveguide.

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Type
patent
EPO Family ID

86330063

Author(s)
Kippenberg, Tobias  
Ji, Xinru  
Wang, Rui Ning
Issuers

École Polytechnique Fédérale de Lausanne

Note

Alternative title(s) : (fr) Guide d'ondes de nitrure de silicium ou procédé de fabrication de circuit intégré photonique

EPFL units
AVP-R-TTO  
IdentifierCountry codeKind codeDate issued

WO2024231800

WO

A1

2024-11-14

Available on Infoscience
February 3, 2025
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/246407
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