ICLAB - Integrated Circuits Laboratory
09:31Ultra Low Noise CMOS Image Sensors. Thèse EPFL, n° 7248 (2016)
19:12Double-Gate Negative-Capacitance MOSFET with PZT gate stack on Ultra-Thin Body SOI: an Experimentally Calibrated Simulation Study of Device Performance, accepted in IEEE Transactions on Electron Devices, 2016.
18:43GigaRad Total Ionizing Dose and Post-Irradiation Effects on 28 nm Bulk MOSFETs. IEEE Nuclear Science Symposium, Strasbourg, France, 29 Oct - 06 Nov 2016.
11:01Approximate 32-Bit Floating-Point Unit Design with 53% Power-Area Product Reduction. ESSCIRC, Lausanne, Switzerland, 2016.
14:35Overcoming the Power Wall by Exploiting Inexactness and Emerging COTS Architectural. 29th IEEE INTERNATIONAL SYSTEM-ON-CHIP CONFERENCE, Seattle, WA, USA, September 6-9, 2016.
11:23Design of energy-efficient discrete cosine transform using pruned arithmetic circuits. 2016 IEEE International Symposium on Circuits and Systems (ISCAS), Montreal, Canada, 22-25 May 2016.
12:08Design methodology for low power RF LNA based on the figure of merit and the inversion coefficient. [u'21st IEEE International Conference on Electronics, Circuits, and Systems (IEEE ICECS)', u'21st IEEE International Conference on Electronics, Circuits, and Systems (IEEE ICECS)'].
19:30A Sub-0.5 Electron Read Noise VGA Image Sensor in a Standard CMOS Process, in IEEE Journal of Solid-State Circuits, vol. 51, num. 9, p. 2180-2191, 2016.
23:55A Low-power Carry Cut-Back Approximate Adder with Fixed-point Implementation and Floating-point Precision. 2016 ACM/EDAC/IEEE Design Automation Conference (DAC), Austin, Texas, USA, June 5-9, 2016.
17:07Impact of GigaRad Ionizing Dose on 28nm Bulk MOSFETs for Future HL-LHC. ESSDERC 2016, Lausanne, Switzerland, September 12-15,2016.