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Energy Efficiency Comparison of Asynchronous and Synchronous Circuits Operating in the Sub-Threshold Regime
Akgun, Omer Can ; Leblebici, Yusuf In: Journal of Low Power Electronics, vol. 3, 2008, p. 320-336
Date: 2008
Digital circuits operating in the sub-threshold regime are able to perform minimum energy operation at a given delay. [...]
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2. |
A Current Sensing Completion Detection Method for Asynchronous Pipelines Operating In the Sub-threshold Regime
Akgun, Omer Can ; Gürkaynak, Frank K. ; Leblebici, Yusuf In: International Journal of Circuit Theory and Applications, vol. 37, num. 2, 2009, p. 203-220
Date: 2009
Digital circuits operating in the sub-threshold regime are able to perform minimum energy operation at a given delay. [...]
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3. |
High-voltage devices and circuits in standard CMOS technologies
Ballan, Hussein ; Declercq, Michel (dir.) Ph.D. Thesis
Lausanne: EPFL, 1997.
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4. |
Improving tokamak vertical position control in the presence of power supply voltage saturation
Favez, J-Y ; Lister, J B ; Müllhaupt, Ph ; Srinivasan, B In: Plasma Phys. Control. Fustion, vol. 47, 2005, p. 1709-1741
Date: 2005
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5. |
Distribution management system including dispersed generation and storage in a liberalized market environment
Kägi-Kolisnychenko, Elvira ; Germond, Alain-J. (dir.) ; Cherkaoui, Rachid (dir.) Ph.D. Thesis
Lausanne: EPFL, 2009.
Distribution systems are now fundamentally changing. [...]
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6. |
Modeling of a vanadium redox flow battery electricity storage system
Blanc, Christian ; Rufer, Alfred (dir.) Ph.D. Thesis
Lausanne: EPFL, 2009.
Today, the electricity industries are facing new challenges as the market is being liberalized and deregulated in many countries. [...]
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7. |
Design and analysis techniques for dynamic current mirrors
Wegmann, George ; Vittoz, Eric A. (dir.) Ph.D. Thesis
Lausanne: EPFL, 1990.
Today's world of electronics becomes more and more digital and therefore CMOS becomes the dominant technology. [...]
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8. |
A Slew Controlled LVDS Output Driver Circuit in 0.18um CMOS Technology
Tajalli, Armin ; Leblebici, Yusuf In: IEEE Journal of Solid-State Circuits, vol. 44, num. 2, 2009, p. 538-548
Date: 2009
This article presents a power-efficient low-voltage differential signaling (LVDS) output driver circuit. [...]
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9. |
Circuit Techniques to Reduce the Supply Voltage Limit of Subthreshold MCML Circuits
Alioto, M ; Leblebici, Y Presented at: 16th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2008), Rhodos, Greece, October 13-15, 2008.
In: Proceedings of 16th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2008), 2008
Date: 2008
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10. |
A Low-Power Adaptive Bias/Clock Generator for Fine-Grained Voltage and Frequency Scaling in Multi-Core Systems
Toprak, Zeynep ; Leblebici, Yusuf In: WSEAS TRANSACTIONS on SYSTEMS, vol. 4, num. 12, 2005, p. 2390-2397
Date: 2005
This paper presents a continuous voltage and frequency scaling approach achieving lower transition (both energy and time) overheads implied by changing voltage levels, at a very low power dissipation and silicon area cost for multi-processor systems with imposed time constraints. [...]
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