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  4. ProteusTM: Abstraction Meets Performance in Transactional Memory
 
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ProteusTM: Abstraction Meets Performance in Transactional Memory

Didona, Diego  
•
Diegues, Nuno
•
Kermarrec, Anne-Marie  
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April 2, 2016
21th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)

The Transactional Memory (TM) paradigm promises to greatly simplify the development of concurrent applications. This led, over the years, to the creation of a plethora of TM implementations delivering wide ranges of performance across workloads. Yet, no universal implementation fits each and every workload. In fact, the best TM in a given workload can reveal to be disastrous for another one. This forces developers to face the complex task of tuning TM implementations, which significantly hampers their wide adoption. In this paper, we address the challenge of automatically identifying the best TM implementation for a given workload. Our proposed system, ProteusTM, hides behind the TM interface a large library of implementations. Underneath, it leverages a novel multi-dimensional online optimization scheme, combining two popular learning techniques: Collaborative Filtering and Bayesian Optimization. We integrated ProteusTM in GCC and demonstrate its ability to switch between TMs and adapt several configuration parameters (e.g., number of threads). We extensively evaluated ProteusTM, obtaining average performance < 3% from optimal, and gains up to 100× over static alternatives.

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asplos137.pdf

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http://purl.org/coar/version/c_970fb48d4fbd8a85

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