A Micropower Neural Recording Amplifier with Improved Noise Efficiency Factor

• Presented at: 19th European Conference on Circuit Theory and Design (ECCTD), Antalya, Turkey, August 23-27, 2009
• Published in: Proceedings of the 19th European Conference on Circuit Theory and Design (ECCTD), p. 319-322
• Publication date: 2009

This article presents a neural recording amplifier suitable for large-scale integration with multi-electrode arrays (MEAs) in very low-power microelectronic cortical implants. The proposed amplifier is the most energy-efficient structure reported to date, which achieves an effective noise efficiency factor (NEF) smaller than the theoretical limit that was claimed in literature for any existing amplifier (NEF=2.02). The proposed technique, which is referred to as partially OTA sharing technique, achieves a significant reduction of power dissipation as well as silicon area, in addition to the very low NEF. The effect of systematic mismatch on crosstalk between adjacent channels and the trade-off between noise and crosstalk are theoretically analyzed. For an array of four neural amplifiers, simulation results show a midband gain of 39.2 dB and a -3dB bandwidth from 10 Hz to 10.6 kHz. The input referred noise is simulated to be 2.21 μVrms and the power consumption is 7.92 μW from 1.8 V supply, which refers to NEF=1.8. The worst-case crosstalk within the desired bandwidth is -46.1dB.

Keywords: Cortical implants, Neural Amplifier, noise ; efficincy factor, Partially OTA sharing technique, crosstalk

Reference

• LSM-CONF-2010-005
• doi:10.1109/ECCTD.2009.5274982
• View record in Web of Science

• URL: http://ieeexplore.ieee.org/search/srchabstract.jsp?arnumber=5274982&isnumber=5274921&punumber=5247537&k2dockey=5274982@ieeecnfs&query=((majidzadeh)%3Cin%3Eau+)&pos=1&access=no

Record created on 2010-01-21, modified on 2012-03-20