SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3D Systems on Chip

• Presented at: DATE 2009, Nice, France, April, 20-24, 2009
• : , 2009

Keywords: 3D ICs ; Networks on chip (NoC) ; synthesis ; topology ; placement ; Performance

Reference

• EPFL-CONF-130693
• View record in Web of Science

Record created on 2009-01-02, modified on 2012-03-20